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silicon wafer fabrication wafer-level packaging front-end process back-end packaging📋 Description
- Own end-to-end supplier development for silicon, wafers, and packaging.
- Engage suppliers early on selection, equipment, and process engineering.
- Provide tech guidance on front-end nodes (7nm/5nm/3nm) and packaging tech (flip-chip, 2.5D/3D/SIP).
- Assess supplier capabilities for wafer fabrication, back-end, and test readiness.
- Lead NPI, production ramp, and reliability campaigns for full-rate manufacturing.
- Develop qualification plans for front-end, back-end, and test, incl reliability.
🎯 Requirements
- Bachelor’s degree in electrical engineering, materials science, semiconductor physics, or related field.
- 1+ years of silicon engineering experience (front-end, back-end, or silicon test).
- Strong background across full silicon lifecycle: front-end, back-end, and test program development.
- Front-end wafer fabrication experience: CMOS, lithography, etching, deposition, CMP.
- Back-end packaging experience: flip-chip, wafer-level packaging, fan-out, wire bonding; SIP.
- Knowledge of JEDEC, AEC Q100, AS9100; solid root-cause analysis and DOE/Six Sigma familiarity.
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