Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)

📋 Description

• Perform partition synthesis and physical implementation steps.
• Develop and improve physical design methodologies and automation scripts.
• Collaborate with ASIC design team on timing, power and area targets.
• Resolve timing/congestion issues and drive execution.
• Run and debug signoff in STA, noise, and DFT/MBIST/LBIST.

🎯 Requirements

• Bachelor’s degree in electrical engineering, computer engineering or computer science.
• 5+ years of ASIC/physical design flow exp.
• Strong experience with RTL2GDSII PD and signoff flows.
• Familiarity with EDA tools and deep sub-micron FinFET CMOS physics.
• Scripting in Python, TCL, Bash or Perl.
• Self-driven, team-oriented in dynamic environment.

🎁 Benefits

• Equal Opportunity Employer.
• ITAR compliance and accommodations information available.