Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)

📋 Description

• Partition synthesis and physical implementation (synthesis, floorplanning, P&R, timing, signoffs)
• Develop/improve physical design methodologies and automation scripts
• Collaborate with ASIC design team to drive feasibility studies and targets
• Resolve design timing/congestion issues and drive execution
• Run and fix signoff issues in STA, noise, and physical verification

🎯 Requirements

• Bachelor’s degree in electrical engineering, computer engineering or computer science
• 5+ years ASIC and/or physical design flow development experience
• Strong ASIC/SOC RTL2GDSII physical design and signoff flows
• Strong experience with industry-standard EDA tools
• Knowledge of deep sub-micron FinFET and CMOS solid state physics
• Good scripting skills (Python, Perl, TCL)

🎁 Benefits

• Stock options and long-term incentives
• Medical, vision, and dental coverage
• 401(k) retirement plan
• Disability and life insurance
• Paid parental leave
• Paid vacation and holidays