Sr. Silicon Packaging Process Engineer, Silicon Technology (Starlink)

Added
less than a minute ago
Type
Full time
Salary
Salary not provided

Related skills

sip mcm bga fccsp wlcsp

πŸ“‹ Description

  • Own packaging assembly processes from concept to mass production for wafer-level and chip-level systems
  • Develop packaging technologies and baselines for assembly lines
  • Bring-up for NPI and NTI for packaging lines
  • Own packaging prototypes, product development and release to production
  • Select equipment and materials to meet quality, reliability, cost, and yield targets
  • Interface with suppliers for continuous improvement and cost reduction

🎯 Requirements

  • Bachelor's degree in electrical, mechanical, chemical engineering, materials science, or physics
  • 5+ years of professional experience in semiconductor assembly and packaging
  • Advanced technical degree
  • 7+ years industry experience with microelectronics packaging development
  • Packaging familiarity with flip-chip, BGA, fcCSP, WLCSP, SiP, MCM
  • Hands-on packaging, PCB/PCBA, or SMT assembly experience
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