Sr. RTL Design Engineer (Silicon Engineering)

📋 Description

• Evaluate architectural trade-offs based on features, performance requirements and system limitations
• Define micro-architecture, implement RTL in Verilog/SystemVerilog, integrate and verify
• Collaborate with verification to cover and verify all design aspects
• Provide timing constraints and support synthesis, timing closure, formal checks
• Participate in silicon bring-up and validation

🎯 Requirements

• Bachelor’s degree in EE, CE, or CS
• 5+ years RTL implementation
• ASIC/SoC system integration experience
• Embedded CPU subsystems
• AXI/AHB bus protocols
• Python scripting

🎁 Benefits

• Stock options and long-term incentives
• Medical, vision, and dental coverage
• 401(k) retirement plan
• Disability and life insurance
• Paid parental leave
• Paid vacation and holidays