Sr. RFIC Layout Designer (Silicon Engineering)

Added
26 days ago
Type
Full time
Salary
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Related skills

linux python perl rfic analog layout

πŸ“‹ Description

  • Define chip floor plan incl. power/ground and pad locations with packaging
  • Estimate layout schedule and flag areas of complexity early
  • Layout RF/analog blocks with matching and minimized parasitics
  • Perform DRC, ERC, LVS and fix errors
  • Top-level layout integration with ESD structures and pad assembly; tape-out
  • Collaborate with EDA vendors to trial new tools/features

🎯 Requirements

  • B.S. in Electrical/Computer Engineering + 5+ yrs IC layout; OR 8+ yrs exp.
  • Strong analog layout skills
  • Advanced node layouts: 22nm/16nm/7nm/5nm
  • RF block layout exp: LNA, VCO, mixers
  • Python/Perl/Shell or similar scripting
  • Linux and revision control experience

🎁 Benefits

  • Medical, vision and dental coverage
  • 401(k) retirement plan
  • Disability and life insurance
  • Paid parental leave; vacation and holidays
  • Employee stock purchase plan
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