Sr. ASIC DFT Engineer (Silicon)

Added
10 days ago
Type
Full time
Salary
Salary not provided

Related skills

dft atpg ist siemens tessent teradyne

πŸ“‹ Description

  • Implement and optimize DFT architectures using Siemens Tessent.
  • Integrate and verify DFT IPs and fabrics in subsystems.
  • Set up ATPG tools and patterns for stuck-at, transition, and delay models.
  • Run and debug non-timing and SDF-annotated gate-level simulations.
  • Create and validate DFT patterns for post-silicon bringup and ATE debugging.
  • Develop test scripts with Perl, Python, Tcl, or C++.
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