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2 days ago
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python asic uvm rtl ovm📋 Description
- Responsible for digital ASIC verification at block and system level
- Write and review test plans, develop test harnesses and test sequences
- Execute test plans, run regressions, code and functional coverage closure
- Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
- Hands-on self-starter who can verify a complex digital design
🎯 Requirements
- Bachelor’s degree in electrical engineering or computer engineering
- 5+ years of design verification and test bench development
- Experience with UVM/OVM/VMM
- Strong object-oriented programming knowledge
- Python scripting for automation
- RTL design, chip bring-up, and post-silicon validation
🎁 Benefits
- Work on space-grade ASICs for Starlink
- Collaborative cross-disciplinary teams
- Growth opportunities in Silicon Engineering
- On-site roles at multiple SpaceX offices
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