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python uvm rtl design ovm vmm📋 Description
- Digital ASIC verification at block and system level
- Write and review test plans; develop test harnesses and sequences
- Execute test plans; run regressions; achieve code and functional coverage
- Contribute to pre-silicon verification and post-silicon validation
- Hands-on self-starter who can verify complex digital designs
🎯 Requirements
- Bachelor's degree in electrical or computer engineering
- 5+ years in design verification and test bench development
- UVM/OVM/VMM verification experience
- Strong OO programming and Python scripting
- Constrained random verification experience
- RTL design, chip bring-up, and post-silicon validation
🎁 Benefits
- Medical, vision, and dental coverage
- 401(k) retirement plan with company match
- Stock options and long-term incentives
- Paid parental leave; 3 weeks vacation; 10+ holidays
- Life insurance and disability coverage; Employee Stock Purchase Plan
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