Related skills
python uvm rtl ovm vmmπ Description
- Responsible for digital ASIC verification at block and system level
- Write and review test plans, develop test harnesses and sequences
- Execute test plans, run regressions, and close code and functional coverage
- Contribute to pre-silicon verification, chip bring-up and post-silicon validation
- Be a hands-on self-starter who can verify a complex digital design
π― Requirements
- Bachelorβs degree in electrical engineering or computer engineering
- 5+ years of experience with design verification and test bench development
- Experience with verification methodologies such as UVM/OVM/VMM
- Strong object-oriented programming knowledge
- Experience with scripting languages, e.g. Python for automation
- RTL design, chip bring-up, and post-silicon validation experience
π Benefits
- Medical, vision, and dental coverage
- 401(k) retirement plan with company contributions
- Short and long-term disability insurance
- Life insurance
- Paid parental leave
- Paid vacation and holidays
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