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python asic verification uvm rtl📋 Description
- Digital ASIC verification at block and system level.
- Write and review test plans; develop test harnesses and sequences.
- Execute test plans, run regressions, and close coverage.
- Contribute to pre-silicon verification and post-silicon validation.
- Hands-on self-starter; verify complex digital designs.
🎯 Requirements
- Bachelor's degree in electrical or computer engineering.
- 5+ years in design verification and test bench development.
- Advanced degree in electrical or computer engineering (preferred).
- Experience with verification methodologies such as UVM/OVM/VMM.
- Strong object-oriented programming skills.
- Experience in constrained random verification.
🎁 Benefits
- Pay range: $170,000-$230,000 per year
- Stock options and other long-term incentives.
- Medical, vision, dental coverage; 401(k) plan.
- Paid parental leave, vacation and holidays; sick leave.
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