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python doe jmp yield optimization pvtπ Description
- Drive post-silicon bring-up from first silicon to mass production.
- Develop and optimize wafer sort (CP) and final test (FT) screening for yield and quality.
- Build and maintain ATE test programs for advanced-node ASICs.
- Define characterization plans across PVT (process, voltage, temperature).
- Collaborate with Design, Systems, Reliability, Foundry, and OSAT.
- Define KPIs and dashboards for power, performance, yield, quality.
π― Requirements
- BSc or MSc in Electrical/Computer Engineering or related field.
- 5β10 years in Product/Test/Silicon Validation or Post-Silicon.
- Strong understanding of CP, FT, qualification, and high-volume manufacturing.
- Silicon bring-up, characterization, yield analysis, and product qualification.
- Experience with Advantest 93K or Chroma ATE platforms.
- DOE planning, data analysis with Python or JMP.
π Benefits
- Remote-friendly with flexible work options.
- Medical insurance.
- Flexible time off.
- Retirement savings plans.
- Family planning support.
- Inclusion & Diversity resources.
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