Manager, ASIC Design Engineering (Starshield Satellite Engineering)

📋 Description

• Lead a team for digital ASIC/FPGA design on Starshield.
• Lead architecture trades; derive specs; partition HW/SW.
• Define micro-architecture; RTL in Verilog/SystemVerilog; integrate top-level.
• Collaborate with verification to ensure full design coverage.
• Recruit, develop, and retain world-class engineering team.
• Participate in silicon bring-up and automated test lab equipment development.

🎯 Requirements

• Bachelor's degree in electrical/computer engineering, CS, or related field.
• 5+ years RTL/FPGA/ASIC development experience.
• 2+ years direct report management or mentoring engineers.
• Able to work long hours and weekends to meet milestones.
• Willing to travel for off-site testing.
• Active TS-SCI clearance may apply; pre-employment drug test.

🎁 Benefits

• Medical, vision, and dental coverage
• 401(k) retirement plan
• Short- and long-term disability and life insurance
• Paid parental leave and paid holidays
• Vacation and sick leave per policy