Related skills
signal integrity power integrity ethernet gpu hbm📋 Description
- Design HPC compute boards delivering ≥10 TFLOPS for onboard AI/ML and data processing.
- Architect power delivery for 500W+ multi-rail designs with GPU/CPU modules.
- Define thermal interface requirements and hand off to mechanical for packaging.
- Design and validate high-speed memory interfaces (HBM, DDR5), PCIe Gen 4/5, Ethernet.
- Lead hardware bring-up and board-level validation; collaborate with software teams to integrate.
🎯 Requirements
- BSEE with 5+ years designing and bringing up high-speed compute boards.
- Proficient in high-speed PCB design: multi-GHz signals, dense BGA routing, SI.
- Strong power integrity and PDN design: multi-rail architectures, sequencing.
- Experience with PCIe Gen 4/5 topology, config, and Ethernet interfacing.
- Firmware for hardware bring-up and validation experience.
- Hands-on embedded debugging; cross-functional software collaboration.
🎁 Benefits
- Equity, PTO, sick leave, parental leave, and learning stipend.
- Benefits page: https://px.sequoia.com/relativityspace
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