Design compute boards delivering ≥10 TFLOPS for onboard AI/ML.
Architect power delivery networks for 500W+ multi-rail carrier boards with GPU/CPU modules.
Define thermal interface requirements and hand off specs to mechanical team.
Design/validate high-speed interfaces: PCIe Gen4/5, HBM, DDR5, 10GbE.
Lead hardware bringup and board-level validation with software teams.

🎯 Requirements

BSEE with 5+ years designing high-speed digital compute boards.
Proficient in high-speed PCB design: multi-GHz signaling and SI analysis.
Power integrity expertise with multi-rail PDN design.
Experience with PCIe Gen4/5 topology and Ethernet interconnects.
Firmware experience for hardware bring-up and validation.
Space-grade COTS hardware experience, including radiation awareness and derating.

🎁 Benefits

Equity, PTO and sick leave
Parental leave
Annual learning and development stipend
Transparency in compensation practices

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